Fluke MET/CAL Procedure ============================================================================= INSTRUMENT: Fluke 45: (6 month) CAL VER RS-232C /5520 DATE: 01-Oct-98 AUTHOR: Fluke Corporation REVISION: $Revision: 1.10 $ ADJUSTMENT THRESHOLD: 70% NUMBER OF TESTS: 40 NUMBER OF LINES: 317 CONFIGURATION: Fluke 5520A ============================================================================= # # Note: the 6 months spec applies to the Volts DC function only. # All other functions use the 1 year spec. # # Source: # Fluke 45 Service Manual, Verification Procedure (July 1989) # # Compatibility: # 5500/CAL or MET/CAL version 5.1 and later # # Subprocedures: # Sub IEEE-488.2 Identification Query (*IDN?) RS-232 # # Required Files: # ini_val.exe Gets default serial port for UUT from METCAL.INI. # # System Specifications: # TUR calculation is based on specification interval of the accuracy file. # The default 5520A accuracy file contains 90 day specs. # # Fluke makes no warranty, expressed or implied, as to the fitness # or suitability of this procedure in the customer's application. # STEP FSC RANGE NOMINAL TOLERANCE MOD1 MOD2 3 4 CON 1.001 ASK- R Q N P F W 1.002 HEAD EQUIPMENT SETUP 1.003 DISP [32] WARNING 1.003 DISP HIGH VOLTAGE is used or exposed during the performance 1.003 DISP of this calibration. DEATH ON CONTACT may result if 1.003 DISP personnel fail to observe safety precautions. 1.004 DISP Connect the UUT to an AC power source. 1.004 DISP Turn the UUT on. 1.004 DISP Warm-up time: 1 hour. 1.004 DISP Ambient temperature: 18C - 28C. 1.004 DISP Relative humidity: less than 70% MOhm ranges only. 1.004 DISP less than 90% all other functions and ranges. 1.005 DOS ini_val metcal.ini startup port 1.006 DISP Connect the UUT to [MEM2]. 1.007 DISP To select the proper RS-232C parameters on Fluke 45: 1.007 DISP Press 2ND, then RATE to select COMM. 1.007 DISP Use the up and down arrow keys to make selections. 1.007 DISP Select 4800 baud and press AUTO. 1.007 DISP Select no Parity and press AUTO. 1.007 DISP Select OFF Echo and press AUTO. 1.008 PORT [P4800,N,8,1,X][T10000][TERM LF]REMS[10][I!] 1.009 CALL Sub IEEE-488.2 Identification Query (*IDN?) RS-232 1.010 ASK- U 1.011 TARGET 1.012 MATH M[1] = 0 1.013 PORT *TST?[10] # Wait 15s before attempting to read self-test response. 1.014 LABEL SELF_TEST 1.015 HEAD PERFORMING SELF TEST.[D500] 1.016 HEAD PERFORMING SELF TEST..[D500] 1.017 HEAD PERFORMING SELF TEST...[D500] 1.018 HEAD PERFORMING SELF TEST....[D500] 1.019 MATH M[1] = M[1] + 2 1.020 JMPL SELF_TEST M[1] < 15 1.021 PORT [I][I!] 1.022 EVAL -e MEM == 0 : Self Test 2.001 JMP 40.002 FAIL 2.002 ASK+ U 2.003 HEAD EQUIPMENT SETUP 2.004 DISP *************************************************** 2.004 DISP To reduce noise pickup by test leads, particularly 2.004 DISP during high Ohms verification, use shielded test 2.004 DISP cables between the Fluke 5520A and Fluke 45. 2.004 DISP *************************************************** 2.005 JMP 3.001 2.006 EVAL dummy: sets stmt number for REPeat test option 3.001 HEAD {DIRECT VOLTAGE PERFORMANCE VERIFICATION} 3.002 DISP Connect the 5520A and the UUT as follows. 3.002 DISP [32] 5520A NORMAL HI to 45 V Ohm 3.002 DISP [32] 5520A NORMAL LO to 45 COM 3.003 PORT TRIGGER 3;VDC;RATE S;RANGE 1[10][I!] 3.004 5520 0.000mV S 2W 3.005 PORT *TRG;VAL1?[10][I][I!] 3.006 MATH MEM = MEM * 1000 3.007 MEME 3.008 MEMC 100 mV 0.006U 4.001 PORT VDC;RATE S;RANGE 1[10][I!] 4.002 5520 90.000mV S 2W 4.003 PORT *TRG;VAL1?[10][I][I!] 4.004 MATH MEM = MEM * 1000 4.005 MEME 4.006 MEMC 100 mV 0.024U 5.001 PORT VDC;RATE S;RANGE 2[10][I!] 5.002 5520 900.00mV S 2W 5.003 PORT *TRG;VAL1?[10][I][I!] 5.004 MATH MEM = MEM * 1000 5.005 MEME 5.006 MEMC 1000 mV 0.24U 6.001 PORT VDC;RATE M;RANGE 1[10][I!] 6.002 5520 0.00mV S 2W 6.003 PORT [D2000]*TRG;VAL1?[10][I][I!] 6.004 MATH MEM = MEM * 1000 6.005 MEME 6.006 MEMC 300 mV 0.02U 7.001 PORT VDC;RATE M;RANGE 1[10][I!] 7.002 5520 300.00mV S 2W 7.003 PORT *TRG;VAL1?[10][I][I!] 7.004 MATH MEM = MEM * 1000 7.005 MEME 7.006 MEMC 300 mV 0.08U 8.001 PORT VDC;RANGE 2[10][I!] 8.002 5520 3.0000V S 2W 8.003 PORT *TRG;VAL1?[10][I][I!] 8.004 MEME 8.005 MEMC 3 V 0.0008U 9.001 5520 -3.0000V S 2W 9.002 PORT *TRG;VAL1?[10][I][I!] 9.003 MEME 9.004 MEMC 3 V 0.0008U 10.001 PORT VDC;RANGE 3[10][I!] 10.002 5520 30.000V S 2W 10.003 PORT *TRG;VAL1?[10][I][I!] 10.004 MEME 10.005 MEMC 30 V 0.008U 11.001 PORT VDC;RANGE 4[10][I!] 11.002 5520 300.00V S 2W 11.003 PORT *TRG;VAL1?[10][I][I!] 11.004 MEME 11.005 MEMC 300 V 0.08U 12.001 PORT VDC;RANGE 5[10][I!] 12.002 5520 1000.0V S 2W 12.003 PORT *TRG;VAL1?[10][I][I!] 12.004 MEME 12.005 MEMC 1000 V 0.4U 13.001 5520 * S 13.002 ASK- U # Diode test PASS/FAIL performance not critical. T.U.R. not applicable. 13.003 HEAD {DIODE TEST PERFORMANCE VERIFICATION} 13.004 PORT DIODE;RATE M[10][I!] 13.005 5520 0.0000Z S 2W 13.006 PORT *TRG;VAL1?[10][I][I!] 13.007 MEME 13.008 MEMC V 0.0008U 14.001 ASK+ U 14.002 5520 * S 14.003 PORT *TRG;VAL1?[10][I][I!] 14.004 MATH MEM1 = 1000000000 14.005 MEME 14.006 MEMC Z 1U 15.001 HEAD {ALTERNATING VOLTAGE PERFORMANCE VERIFICATION} 15.002 PORT VAC;RATE M;RANGE 1[10][I!] 15.003 5520 0.00mV S 2W 15.004 PORT *TRG;VAL1?[10][I][I!] 15.005 MATH MEM = MEM * 1000 15.006 MEME 15.007 MEMC 300 mV 0.75U 16.001 5520 15.00mV 1kH SI S 2W 16.002 PORT *TRG;VAL1?[10][I][I!] 16.003 MATH MEM = MEM * 1000 16.004 MEME 16.005 MEMC 300 mV 0.13U 1kH 17.001 5520 15.00mV 100kH SI S 2W 17.002 PORT *TRG;VAL1?[10][I][I!] 17.003 MATH MEM = MEM * 1000 17.004 MEME 17.005 MEMC 300 mV 1.25U 100kH 18.001 5520 300.00mV 1kH SI S 2W 18.002 PORT *TRG;VAL1?[10][I][I!] 18.003 MATH MEM = MEM * 1000 18.004 MEME 18.005 MEMC 300 mV 0.70U 1kH 19.001 5520 300.00mV 100kH SI S 2W 19.002 PORT *TRG;VAL1?[10][I][I!] 19.003 MATH MEM = MEM * 1000 19.004 MEME 19.005 MEMC 300 mV 15.50U 100kH 20.001 PORT VAC;RANGE 2[10][I!] 20.002 5520 3.0000V 1kH SI S 2W 20.003 PORT *TRG;VAL1?[10][I][I!] 20.004 MEME 20.005 MEMC 3 V 0.0070U 1kH 21.001 PORT VAC;RANGE 3[10][I!] 21.002 5520 30.000V 1kH SI S 2W 21.003 PORT *TRG;VAL1?[10][I][I!] 21.004 MEME 21.005 MEMC 30 V 0.070U 1kH 22.001 PORT VAC;RANGE 4[10][I!] 22.002 5520 300.00V 1kH SI S 2W 22.003 PORT *TRG;VAL1?[10][I][I!] 22.004 MEME 22.005 MEMC 300 V 0.70U 1kH 23.001 PORT VAC;RANGE 5[10][I!] 23.002 5520 750.0V 1kH SI S 2W 23.003 PORT *TRG;VAL1?[10][I][I!] 23.004 MEME 23.005 MEMC 750 V 2.5U 1kH 24.001 HEAD {FREQUENCY PERFORMANCE VERIFICATION} 24.002 PORT FREQ;RATE M;RANGE 2[10][I!] 24.003 5520 9.000kH 1V SI S 2W 24.004 PORT *TRG;VAL1?[10][I][I!]*TRG;VAL1?[10][I][I!] 24.005 MATH MEM = MEM / 1000 24.006 MEME 24.007 MEMC 10 kH 0.006U 1V 25.001 5520 * S 25.002 HEAD {RESISTANCE PERFORMANCE VERIFICATION} 25.003 DISP [32] Connect the 5520A and the UUT as follows. 25.003 DISP [32] 5520A NORMAL HI to 45 V Ohm 25.003 DISP [32] 5520A NORMAL LO to 45 COM 25.003 DISP [32] 5520A AUX HI to 45 V Ohm 25.003 DISP [32] 5520A AUX LO to 45 COM 25.004 PORT OHMS;RATE M;RANGE 1[10][I!] 25.005 5520 0.00Z S CW 25.006 PORT *TRG;VAL1?[10][I][I!] 25.006 PORT RELSET [MEM][10][I!] 25.006 PORT *TRG;VAL1?[10][I][I!] 25.007 MEME 25.008 MEMC 300 Z 0.04U 26.001 5520 190.00Z S CW 26.002 PORT *TRG;VAL1?[10][I][I!] 26.003 MEME 26.004 MEMC 300 Z 0.14U 27.001 PORT OHMS;RATE M;RANGE 2[10][I!] 27.002 5520 0.0000kZ S CW 27.003 PORT *TRG;VAL1?[10][I][I!] 27.004 MATH MEM = MEM / 1000 27.005 MEME 27.006 MEMC 3 kZ 0.0002U 28.001 5520 1.9000kZ S CW 28.002 PORT *TRG;VAL1?[10][I][I!] 28.003 MATH MEM = MEM / 1000 28.004 MEME 28.005 MEMC 3 kZ 0.0012U 29.001 PORT OHMS;RATE M;RANGE 3[10][I!] 29.002 5520 19.000kZ S CW 29.003 PORT *TRG;VAL1?[10][I][I!] 29.004 MATH MEM = MEM / 1000 29.005 MEME 29.006 MEMC 30 kZ 0.012U 30.001 5520 * S 30.002 DISP [32] Connect the 5520A and the UUT as follows. 30.002 DISP [32] 5520A NORMAL HI to 45 V Ohm 30.002 DISP [32] 5520A NORMAL LO to 45 COM 30.003 PORT OHMS;RATE M;RANGE 4[10][I!] 30.004 5520 190.00kZ S 2W 30.005 PORT *TRG;VAL1?[10][I][I!] 30.006 MATH MEM = MEM / 1000 30.007 MEME 30.008 MEMC 300 kZ 0.12U 31.001 PORT OHMS;RATE M;RANGE 5[10][I!] 31.002 5520 1.9000MZ S 2W 31.003 PORT *TRG;VAL1?[10][I][I!] 31.004 MATH MEM = MEM / 1000000 31.005 MEME 31.006 MEMC 3 MZ 0.0013U 32.001 PORT OHMS;RATE M;RANGE 6[10][I!] 32.002 5520 19.000MZ S 2W 32.003 PORT *TRG;VAL1?[10][I][I!] 32.004 MATH MEM = MEM / 1000000 32.005 MEME 32.006 MEMC 30 MZ 0.051U 33.001 PORT OHMS;RATE M;RANGE 7[10][I!] 33.002 5520 100.0MZ S 2W 33.003 PORT *TRG;VAL1?[10][I][I!] 33.004 MATH MEM = MEM / 1000000 33.005 MEME 33.006 MEMC 300 MZ 2.0U 34.001 HEAD {LOW CURRENT PERFORMANCE VERIFICATION} 34.002 DISP Connect the 5520A and the UUT as follows. 34.002 DISP [32] 5520A AUX HI to 45 100mA 34.002 DISP [32] 5520A AUX LO to 45 COM 34.003 PORT ADC;RATE M;RANGE 1[10][I!] 34.004 5520 30.000mA S 2W 34.005 PORT *TRG;VAL1?[10][I][I!] 34.006 MATH MEM = MEM * 1000 34.007 MEME 34.008 MEMC 30 mA 0.018U 35.001 PORT ADC;RATE M;RANGE 2[10][I!] 35.002 5520 100.00mA S 2W 35.003 PORT *TRG;VAL1?[10][I][I!] 35.004 MATH MEM = MEM * 1000 35.005 MEME 35.006 MEMC 100 mA 0.07U 36.001 PORT AAC;RATE M;RANGE 1[10][I!] 36.002 5520 30.000mA 1kH SI S 2W 36.003 PORT *TRG;VAL1?[10][I][I!] 36.004 MATH MEM = MEM * 1000 36.005 MEME 36.006 MEMC 30 mA 0.160U 1kH 37.001 PORT AAC;RATE M;RANGE 2[10][I!] 37.002 5520 100.00mA 1kH SI S 2W 37.003 PORT *TRG;VAL1?[10][I][I!] 37.004 MATH MEM = MEM * 1000 37.005 MEME 37.006 MEMC 100 mA 0.60U 1kH 38.001 5520 * S 38.002 HEAD {HIGH CURRENT PERFORMANCE VERIFICATION} 38.003 DISP Connect the 5520A and the UUT as follows. 38.003 DISP [32] 5520A 20A to 45 10A 38.003 DISP [32] 5520A AUX LO to 45 COM 38.004 PORT ADC;RATE M;RANGE 3[10][I!] 38.005 5520 10.000A HC S 2W 38.006 PORT *TRG;VAL1?[10][I][I!] 38.007 MEME 38.008 MEMC 10 A 0.025U 39.001 PORT AAC;RATE M;RANGE 3[10][I!] 39.002 5520 10.000A 1kH SI HC S 2W 39.003 PORT *TRG;VAL1?[10][I][I!] 39.004 MEME 39.005 MEMC 10 A 0.110U 1kH 40.001 5520 * S 40.002 PORT *RST[10][I!][D1000]LOCS[10][I!] 40.003 END